Semiconductor Engineering

Metrology Digs Deep To Produce Next-Generation 3D NAND

Deep vertical holes and re-entrant features challenge the best metrology methods.

Samsung unveils ferroelectric NAND breakthrough to cut power use by up to 96%

As the AI boom fuels massive data-center buildouts, demand for memory keeps climbing – and with it, the notoriously high power consumption of today's NAND. Samsung's ...
Tom's Hardware on MSN

Samsung touts 96% lower-power NAND design — researchers investigate design based on ferroelectric transistors

Samsung researchers have published a detailed account of an experimental NAND architecture that aims to cut one of the technology’s largest power drains by as much as 96%.
Electronic Design

Rad-Hard-by-Design: GaN Semis for Next-Gen Space and Defense Systems

Enter the realm of radiation hardness and space-qualified power system designs that employ gallium-nitride power semiconductors.
Electronics Weekly

Single logic gates in 1 x 1.45mm package also shift level

Toshiba has put single logic gates into the 1 x 1.45mm XSON6 package, in two series with differing input characteristics. 12 of them are in the 7UL1G series, which operate across 0.9 to 3.6V and have ...
IEEE

Thermal Stability of Gate Driver Circuits Based on 4H-SiC MOSFETs at 300°C for High-Power Applications

Abstract: The operation and reliability of gate driver circuits based on 4H-SiC MOSFETs at temperatures up to 300°C were reported. Due to the advantages of 4H-SiC MOSFETs, the driver circuit can ...
IEEE

A study on Low-Power Fully Differential Distributed Laser Driver Circuits with Gate-Line-Division Technique for Optical Access Networks

Abstract: With the increasing demand for network services, energy efficiency in Passive Optical Networks (PONs) has become a critical concern. This study addresses how to decrease power consumption of ...