IEEE

ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication

Abstract: Field-programmable gate arrays (FPGAs) and field-programmable analog arrays (FPAAs) are reconfigurable circuits that enable flexible digital and analog implementations post-manufacturing.
IEEE

Hybrid CPU-FPGA Accelerated Architecture for Hurst Surface Feature Extraction and SVM Classification of ECG Signals

Abstract: In this paper, a hybrid CPU-FPGA architecture is proposed to accelerate the extraction of contour-based features from ECG-derived Hurst surface images, coupled with an FPGA-accelerated ...
GitHub

A comprehensive HDL toolchain for compiling Loihi-style spiking neural networks onto affordable FPGA platforms, implementing the Neuromorphic-FPGA architecture presented at ...

This project provides an end-to-end pipeline for deploying neuromorphic computing models on commodity FPGAs, bridging the gap between high-level SNN frameworks and low-level hardware implementations.