EDN

Timing Diagram Editors Simplify FPGA Synthesis

SynaptiCAD has released an updated version of its timing diagram editor family that simplifies creating the Synopsys Design Constraint (SDC) files used to define the ...
Design-Reuse

FPGA prototyping of complex SoCs: Partitioning and Timing Closure Challenges with Solutions

In the nanometer era, complex SoCs have higher risk of re-spins. Undoubtedly FPGA prototyping is the right way of pre-silicon SoC validation, accelerate system software development and to meet time-to ...
EDN

Fast FPGA-based modules prototype logic on your PC

Instant Logic – just add keystrokes! HDK-0501 is the fastest way to get a digital logic circuit running, with an added bonus of controlling and interactively monitoring your circuit while it runs! HDK ...
Electronic Design

Compact 16-nm FPGA Loads Up on Programmable Logic

The flagship offering in Lattice’s Avant-E family fits 500,000 logic units into a 15- x 13-mm package. Lattice Semiconductor’s new Avant architecture is purpose-built to extend the company’s focus on ...
Design-Reuse

A Reconfigurable System featuring Dynamically Extensible Embedded Microprocessor, FPGA and Customisable I/O

A system-chip targeting image and voice processing and recognition application domains is implemented as a representative of the potential of using programmable logic in system design. It features an ...
Semiconductor Engineering

Micro FPGAs And Embedded FPGAs

When people hear “FPGA” they think “big, expensive, power hungry.” But it doesn’t need to be that way. Renesas has announced their Forge FPGA family. Details are at their website and in one of the ...
Business Wire

Open Source FPGA Launches Foundation to Accelerate Widespread Adoption of Programmable Logic

SALT LAKE CITY--(BUSINESS WIRE)--The Open Source FPGA Foundation today announces its formation as a nonprofit organization focused on accelerating worldwide awareness and widespread adoption of open ...
The Next Platform

Where The FPGA Hits The Server Road For Inference Acceleration

There are an increasing number of ways to do machine learning inference in the datacenter, but one of the increasingly popular means of running inference workloads is the combination of traditional ...
The Next Platform

How The FPGA Can Take On CPU And NPU Engines And Win

We made a joke – sort of – many years ago when we started this publication that the future compute engines would look more like a GPU card than they did a server as we knew it back then. And one of ...